There is an ever-increasing demand for higher levels of integration of semiconductor circuits. As one approach to increasing the density of semiconductor structures, the prior art has integrated devices within the depths of the substrate, in addition to its upper planar surface. For example, dynamic random access memories commonly employ "trenches" for memory cell capacitances. Additionally, slots or trenches are often used to isolate individual devices within monolithic circuits. To further improve monolithic densities, it has been proposed that active semiconductor structures be emplaced within slots/trenches in a substrate. Standard photolithographic techniques, however, are not directly applicable to "personalization" of such concave surface areas.
The prior art shows various approaches to coating concave trench-like structures in semiconductor substrates. Further, the prior art shows that patterns can be produced in such trench areas. For example, reference commonly assigned U.S. Letters Patent issued to Beilstein, Jr. et al., entitled "Process For Positioning A Mask Within A Concave Semiconductor Structure," U.S. Pat. No. 5,096,849. In this patent, a method is described for selectively masking sidewall regions of a concave surface. The method includes the steps of: forming a conformal layer of masking material on a sidewall; emplacing in the concave structure a selectively removable material that partially fills the concave structure, an upper surface of the material defining the edge of a region of the concave structure to be masked; removing a portion of the conformal layer above the upper surface of the selectively removable material; and removing the selectively removable material to leave a region of remaining conformal material as a mask. Although successful in masking the sidewall, this process requires significant in trench processing and limits the mask patterns available.
Thus, a need exists in the semiconductor fabrication art for an improved process technique for selectively defining regions for masking or implanting on a wall of an existing semiconductor structure, such as a sidewall of a substrate trench.